The present invention generally relates to a driving apparatus and a driving method for a liquid crystal display having a plurality of row electrodes and column electrodes. More particularly, the invention relates to such an apparatus and a method in which the row electrodes are divided into groups, each of the electrodes in each group being simultaneously selected each group being sequentially selected for achieving a gray scale display.
Matrix liquid crystal displays such as, twisted nematic (TN) and super twisted nematic (STN), are known in the art. Reference is made to FIG. 49 in which a conventional matrix liquid crystal display is provided. A liquid crystal panel generally indicated as 1 is composed of a liquid crystal layer 5, a first substrate 2 and a second substrate 3 for sandwiching the liquid crystal layer 5 therebetween. A group of column electrodes Y1-Ym are oriented on substrate 2 in the vertical direction and a plurality of row electrodes X1-Xn are formed on substrate 3 in substantially the horizontal direction to form a matrix. Each intersection of column electrodes Y1-Ym and row electrodes X1-Xn forms a display element or pixel 7. Display pixels 7 having the open circle indicate an ON state and those pixels having a blank indicate an OFF state.
A conventional multiplex driving based on the amplitude selective addressing scheme is known to one of ordinary skill in the art as one method of driving the liquid crystal panel mentioned above. In such a method, a selected voltage or non-selected voltage is sequentially applied to each of row electrodes X1-Xn individually. That is, a selection voltage is applied to only one row electrode at a time. In the conventional driving method, the time period required to apply the successive selected or non-selected voltage to all the row electrodes X1-Xn is known as one frame period, indicated in FIGS. 43A-E as time period F. Typically the frame period is approximate {fraction (1/60)}th of a second or 16.66 milliseconds.
Simultaneously to the successive application of the selected voltage or the non-selected voltage to each of the row electrodes X1-Xn, a data signal representing an ON or OFF voltage is applied to column electrodes Y1-Ym. Accordingly, to turn a pixel 7, e.g. the area in which the row electrode intersects the column electrode, to the ON state, an ON voltage is applied to a desired column electrode when the row electrode is selected.
Referring specifically to FIGS. 43A-E, a conventional multiplex drive method of a simple matrix type liquid crystal and more specifically the amplitude selective addressing scheme is shown therein. Such a conventional drive method is not intended to provide the features of achieving a gray scale display. FIGS. 43A-C show the row selection voltage waveforms that are applied in sequence to row electrodes X1, X2 . . . Xn, respectively. More particularly, in time period t1, a voltage pulse having a magnitude of V1 is applied to row electrode X1, and a voltage of zero is applied to electrodes X2-Xn; in time period t2, a voltage pulse having a magnitude of V1 is applied to row electrode X2 and a voltage of zero is applied to electrodes X1 and X3-Xn and in time period tn, V1 is applied to row electrode Xn and a voltage of zero is to electrodes X1-Xnxe2x88x921. In other words, a voltage pulse having a magnitude of V1 is applied to only one row electrode Xi in time ti. Typically, ti is approximately 69 xcexc seconds and V1 is approximately 25 volts. As will be apparent to one who has read this description, all of the row electrodes are sequentially selected in time periods t1-tn or one frame period F.
FIG. 43D shows the waveform applied to column electrode Y1, and FIG. 43E shows the synthesized voltage waveform applied to the pixel 71,1 formed at the intersection of the column electrode Y1 and the row electrode X1. As shown therein, during time period t1, a voltage pulse having a magnitude of V1 is applied to row X1 and a voltage pulse of xe2x88x92V2 is applied to column electrode Y1. Typically, V2 is approximately 1.6 volts. The resultant voltage at pixel 71,1 is (V1-V2). This synthesized voltage is sufficient to turn pixel 71,1 to its ON state.
As noted above this conventional driving method does not display an image having a gray scale. Furthermore, another known problem with this method is that in order to select and drive the one line of the row electrodes, a relatively high voltage is required to provide good display characteristics, such as, contrast and low distortion. These conventional displays, requiring such a high voltage, also consume relatively more energy. When such displays are used in portable devices, they are supplied with electrical energy by, for example, batteries. As a result of the higher energy consumption, the portable devices have relatively shorter times of operation before the batteries require replacement and/or recharging.
Various attempts have been made to overcome this problem. For example parent patent application Ser. No. 08/148,083, filed Nov. 4, 1993, is directed to a method driving a liquid crystal panel comprising the steps of sequentially selecting a group of a plurality of row electrodes during a selection period, simultaneously selecting the row electrodes comprising the group, and dividing and separating the selection period into a plurality of intervals within one frame period.
In another example, it has been suggested in xe2x80x9cA Generalized Addressing Technique for RMS Responding Matrix LCDs,xe2x80x9d 1988 International Display Research Conference, pp. 80-85. to simultaneously apply a row selection voltage to more than one row electrode.
As shown in FIGS. 45A-D, a conventional method for driving a liquid crystal display is provided by simultaneously selecting a group of more than one row electrode. As shown therein, the n row electrodes are divided in j groups of row electrodes, each group comprising, for example, two row electrodes. In this example, row electrodes X1, X2 and X3 and X4, X5 and X6 form first and second groups of row electrodes, respectively.
Referring again to FIG. 45A, that figure illustrates row selection voltage waveforms applied simultaneously to row electrodes X1, X2 and X3 in time periods t11-t18 and a voltage of zero is applied to row electrodes X1, X2 and X3 in the remaining time periods of frame period F. Similarly, FIG. 45B indicates the row selection voltage waveforms applied to row electrodes X4, X5 and X6, during time periods t21-t28 and a voltage of zero is applied to row electrodes X4, X5 and X6 in the other time periods of frame period F. FIG. 45C illustrates the voltage waveform applied to column electrode Y1, and FIG. 45D indicates the synthesized voltage waveform applied to the pixel 71,1. Generally, t1,1,t1,2 . . . tj,n=34.5xcexc seconds, V1 is approximately 17.6 volts and V2 is approximately 2.3 volts.
As shown in the example of FIGS. 45A-D, every-three row electrodes are selected in sequence. In the first selection sequence, three row electrodes, X1, X2 and X3, are selected and row selection voltage waveforms such as that shown in FIG. 45A are applied to each row electrode. At the same time, the designated column voltage, which is described below, is applied to each column electrode, Y1 to Ym. Next, row electrodes X4, X5 and X6 are simultaneously selected with substantially the same type of waveform voltages as that described above. At the same time, the column voltages Y1 to Ym are applied to each column electrode. One frame period represents the selection of all row electrodes, X1 to Xn. In other words, a complete image is displayed during one frame.
As will be explained hereinbelow, when h row electrodes are simultaneously selected, the voltage waveforms that apply the row electrodes described above use 2h row-select patterns. In the example illustrated in FIGS. 45A-D, the number of row electrodes simultaneously selected is three, thus the number of row select patterns is 23 or 8.
Moreover, the column voltages applied to each column electrode Y1 to Ym provide the same number of pulse patterns as that of the row select pulse patterns. That is, there are 2h pulse patterns. These pulse patterns are determined by comparing the states of pixels on the simultaneously selected row electrodes i.e., whether the pixels are ON or OFF, with the polarities of the voltage pulses applied to row electrode.
In this example, as shown in the previously described FIGS. 45A-D, when row electrodes X1, X2 and X3 are selected and row voltages such as those in FIG. 45A are applied thereto and when the pixels on row electrodes X1, X2 and X3 are ON, ON and OFF, respectively, as shown in FIG. 44, the voltage waveform applied the column electrode is voltage waveform Y1 shown in FIG. 45C.
The above-mentioned column voltage waveform Y1 is determined as follows. At first, each pixel simultaneously selected is defined to have a first value of 1 when the voltage applied by the row electrode to the corresponding selected pixel is positive or a first value of 0 when the row electrode is negative. In the example shown in FIGS. 46A, the voltage ON/OFF patterns applied to the three simultaneously selected row electrodes X1, X2, and X3 are shown in the following table using values of 1 and 0 for ON and OFF pixel states, respectively.
Each of the selected pixels is defined to have a second value of 1 when the display state is ON or a second value of 0 when display state is OFF. The first value is compared to the second value bit-by-bit, the number of mismatches, i.e., when the first value does not equal the second value, is calculated. When the number of mismatches for the simultaneously selected rows is zero, xe2x88x92VY2 is applied; when 1, xe2x88x92VY1 is applied; when 2, VY1 is applied; and when 3, VY2 is applied. In this example the ratio of VY1 to VY2 is 1:3.
For example, when the pulse waveforms shown in FIG. 45A are applied to row electrodes X1, X2 and X3, a column voltage having the waveform of Y1 is applied. For time period t11, the column voltage is determined as follows. The pixels formed at the intersections of column electrode Y1 and rows electrodes X1, X2 and X3 are in the ON, ON and OFF states, respectively. For the purposes of this discussion, these pixels will be referred to as the first, second and third pixels, respectively. In other words, the first pixel has a second value of 1, the second pixel has a second value of 1 and the third pixel has a second value of 0 (zero) Those pixels assume the first values, as shown in Table A. Referring to the first pixel, since the first value is 0 and the second value is 1, there is a mismatch. With regard to the second pixel, the first value is 0 and the second value is 1, thereby also forming a mismatch. Finally, referring to the third pixel, the first value is 0 and the second value is also 0, thereby forming a match. Accordingly, the number of mismatches is determined to be 2. Therefore, a voltage of VY1 is applied to the column electrode in time t11.
The row select pattern of the voltage applied to the row electrodes X1, X2, and X3 in time t12 is OFF-OFF-ON. The number of mismatches during this time period is three. Therefore, voltage VY2 is applied as the second pulse to column electrode Y1. Similarly, VY1 is applied as the third pulse, xe2x88x92VY1 as the fourth pulse. Thus the following pulses are, in sequence, xe2x88x92VY2, VY1, xe2x88x92VY1, xe2x88x92VY1 applied to the column electrode in the fifth to eight pules.
The next three row electrodes X4-X6 are then selected, and when the voltage shown in FIG. 45B is applied to these row electrodes X4-X6, a column voltage of the voltage level corresponding to the number of mismatches between the on/off states of the pixels shown in FIG. 44 at the intersections of row electrodes X4-X6 and the column electrode Y1 and the on/off states of the voltage row select patterns applied to the row electrodes X4-X6 as shown in FIG. 45C is applied.
The voltage waveforms generated based on these values for application to the row electrodes are shown in FIG. 46A. The waveform shown in FIG. 46A, however, contains dispersions in the frequency component, which can result in display non-uniformity when applied. In other words, the applied voltage waveforms, include the following different frequency components:
X1:4xc2x7xcex94t,4xc2x7xcex94t
X2:2xc2x7xcex94t,4xc2x7xcex94t,2xc2x7xcex94t
X3:2xc2x7xcex94t,2xc2x7xcex94t,2xc2x7xcex94t,2xc2x7xcex94t
Such differences in frequency appear to cause distortion of the displayed image.
The waveforms modified by reordering the array to eliminate the bias in the frequency component is shown in FIG. 46B. The prior art example shown in FIGS. 45A-D can also utilize these waveforms.
However, when a driving method, such as shown in FIG. 48A or B is used to drive a liquid crystal display panel, the pulse width of each pulse becomes narrower. That is particularly true when the number of simultaneously selected row electrodes increases. In other words, there is an exponential increase in the number of bit word patterns with each pulse width becoming narrower. The narrower pulse width leads to possible rounding when the waveform is applied to pixel and/or crosstalk may occur. These distortions are particularly apparent when a gray scale display is attempted.
In another example, values 1 and xe2x88x921 are used for the positive and negative selection pulses of the row voltage waveform, and xe2x88x921 and 1 are used for the ON and OFF display data states of pixel, respectively, and the column voltage waveform is set according to the difference between the number of matches and the number of mismatches, values of 1 or xe2x88x921 can be used for either, and the column voltage waveform can be set using only the number of matches or the number of mismatches without calculating the difference between the number of matches or the number of mismatches.
FIGS. 47A, Axe2x80x2, B and C depict another example of a conventional method for driving a liquid crystal display by simultaneously selecting a group of more than one row electrode. As shown therein, the n row electrodes are divided in j groups of row electrodes, each group comprising, for example, two row electrodes. In this example, row electrodes X1, X2; X3, X4; and Xnxe2x88x921, Xn, each form a group of row electrodes.
Referring again to FIG. 47A, that figure illustrates row selection voltage waveforms applied simultaneously to both row electrodes X1 and X2 in time periods t1 and t2 and a voltage of zero is applied to row electrodes X1 and X2 in the remaining time periods of frame period F. Similarly, FIG. 47Axe2x80x2 indicates the row selection voltage waveforms applied to row electrodes X3 and X4, during time periods t3 and t4 and a voltage of zero is applied to row electrodes X3 and X4 in the other time periods of frame period F. FIG. 47B illustrates the voltage waveform applied to column electrode Y1, and FIG. 47C indicates the synthesized voltage waveform applied to the pixel 71,1. Generally, t1, t2, . . . tn=69 xcexc seconds, V1 is approximately 17.6 volts and V2 is approximately 2.3 volts.
As shown in the example of FIGS. 47A, Axe2x80x2B and C every two row electrodes are selected in sequence. In the first selection sequence, two row electrodes, X1 and X2, are selected and row selection voltage waveforms such as that shown in FIG. 47A are applied to each row electrode. At the same time, the designated column voltage, which is described below, is applied to each column electrode, Y1 to Ym. Next, row electrodes X3 and X4 are simultaneously selected with substantially the same type of waveform voltages as that described above. At the same time, the column voltages Y1 to Ym are applied to each column electrode. As explained above, one frame period represents the selection of all row electrodes, X1 to Xn.
As will be explained hereinbelow, when h row electrodes are simultaneously selected, the voltage waveforms that apply the row electrodes described above use 2h row-select patterns. In the example illustrated in FIGS. 47A, Axe2x80x2, B and C the number of row electrodes simultaneously selected is two, thus the number of row select patterns is 22 or 4.
Moreover, the column voltages applied to each column electrode Y1 to Ym provide the same number of pulse patterns as that of the row select pulse patterns. That is, there are 2h pulse patterns. These pulse patterns are determined by comparing the states of pixels on the simultaneously selected row electrodes i.e., whether the pixels are ON or OFF, with the polarities of the voltage pulses applied to row electrode.
In this example, as shown in the previously described FIGS. 47A, Axe2x80x2B and C when row electrodes X1 and X2 are selected and row voltages such as those in FIG. 47A and FIG. 48A are applied thereto and when the pixels on row electrodes X1 and X2 are ON and OFF, respectively, the voltage waveform applied the column electrode is voltage waveform Ya shown in FIG. 48B. When the pixels are OFF and ON, respectively, the column voltage waveform Yb is applied to the column electrode. In another example, when the pixels are both ON, a voltage waveform Yc is applied to the column electrode. Finally, when both pixels are OFF, the a column voltage waveform Yd is applied to the column electrode.
The above-mentioned column voltage. waveforms Ya-Yd are determined as follows. At first, each pixel simultaneously selected is defined to have a first value of 1 when the voltage applied by the row electrode to the corresponding selected pixel is positive or a first value of xe2x88x921 when the row electrode is negative. Each of the selected pixels is defined to have a second value of xe2x88x921 when the display state is ON or a second value of 1 when display state is OFF. The first value is compared to the second value bit-by-bit, the difference between the number of matches, i.e., when the first value equals the second value, and the number of mismatches, i.e., when the first value does not equal the second value, is calculated. When the difference between the number of matches and mismatches for the simultaneously selected rows is two, V2 is applied; when 0, V0 is applied; and when xe2x88x922, xe2x88x92V2 is applied.
For example, when the pulse waveforms shown in FIG. 47A are applied to row electrodes X1 and X2, a column voltage having the waveform of Ya is applied. This column voltage is determined as follows. The pixels formed at the intersections of column electrode Y1 and rows electrodes X1 and X2 are in the ON and OFF states, respectively. For the purposes of this discussion, these pixels will be referred to as the first and second pixels, respectively. In other words, the first pixel has a second value of xe2x88x921 and the second pixel has a second value of 1. During the period ta, the first pixel has a first value of xe2x88x921 and the second pixel has a first value of xe2x88x921, since the row voltages X1 and X2 are both xe2x88x92V1. Referring to the first pixel, since the first value is xe2x88x921 and the second value is xe2x88x921, there is a match. With regard to the second pixel, the first value is xe2x88x921 and the second value is 1, thereby forming a mismatch. The difference between the number of matches and mismatches is 1 xe2x88x921 or zero. Therefore, a voltage of 0 (zero) is applied to the column electrode in time ta. Next, concerning the pulse waveforms of the time interval tb, the applied voltage of row electrode X1 is positive and the applied voltage of row electrode pulse X2 is negative. Using a similar analysis as described above, the number of matches is zero and the number of mismatches is 2. Thus, xe2x88x92V2 volts will be applied to the second half of time interval t1.
As should now be apparent, the first values in time interval tc in FIG. 47A are xe2x88x921 and 1 because the applied voltage of row electrode X1 is negative and the applied voltage of row electrode X2 is positive. When these are compared with the second values of the first and second pixels of xe2x88x921 and 1, the number of matches is two and the number of mismatches is zero. The difference between the number of matches and the number of mismatches is 2. Thus, the column voltage of V2 volts will be applied in time interval tc.
In time interval td, the applied voltage of row electrodes X1 and X2 are both positive. Thus, the first values are 1 and 1. When compared to the pixel states of xe2x88x921 and 1, the number of matches is 1 and the number of mismatches is 1, thus the difference between the number of matches and the number of mismatches is zero. Accordingly, zero volts will be applied to Ya for the time interval td.
A summary of this analysis for time periods ta, tb, tc and td, is shown in Table B below:
As is readily apparent, the column voltage Ya corresponds to the column voltage pattern and is applied to the column to place the first pixel in its ON state and the second pixel in its OFF state.
As for the other column voltage waveforms, Yb to Yd, the voltages are selected under the same criteria as described above and are summarized in Tables C, D and E hereinbelow:
In the examples above, the first value is 1 when the row-select voltage has a positive polarity or the first value when the row-select voltage has a negative polarity. Additionally, the second value is xe2x88x921 when the display state of the pixel is ON, or 1 when the display state is OFF. The column voltage waveforms were selected by means of the difference between the number of matches and the number of mismatches.
As described above, these methods of simultaneously selecting and driving plural sequential row electrodes can suppress the drive voltage while achieving the same on/off ratio as the single line selection method shown in FIGS. 43A-E.
The following is a general discussion regarding the conventional method for simultaneously selecting multiple row electrodes.
A. Requirements
A The N number of row electrodes to be displayed are divided up into N/h non-intersecting subgroups.
B Each subgroup has h number of address lines.
C At a particular time, the display data on each column electrode is composed of an h-bit words, e.g.:
xe2x80x83dk*h+1, dk*h+2 dk*h+h; dk*h+j=0 or 1
Where 0 k (N/h)xe2x88x921 (k: subgroup)
In other words, one column of display data is:
d1, d2 dhSubgroup 0
dh+1, dh+2 dh+hSubgroup 1
dNxe2x88x92h+1, dNxe2x88x92h+2 dNxe2x88x92h+h Subgroup N/hxe2x88x921
D The row-select pattern has 2h cycle and is represented by an h-bit words, e.g.:
ak*h+1, ak*h+2 ak*h+h; ak*h+j=0 or 1
B. Guidelines
(1) One subgroup is selected simultaneously for addressing.
(2) One h-bit word is selected as the row-select pattern.
(3) The row-select voltages are:
xe2x88x92Vr for a logic 0,
+Vr for a logic 1,
0 volts or ground for the unselected period.
(4) The row-select patterns and the display data patterns in the selected subgroup are compared bit by bit such as with digital comparators, viz. exclusive OR logic gates.
(5) The number of mismatches i between these two patterns is determined by counting the number of exclusive-OR logic gates having a logical 1 output.
Steps 1-4 are summarized by the following equation:   i  =            ∑              j        =        1            h        ⁢          xe2x80x83        ⁢                  a                              k            *            h                    +          j                    ⊕                        d                                    k              *              h                        +            j                          ⁢                  xe2x80x83                ⁢                  (                      0            ≤            i            ≤            h                    )                    
(6) The column voltage is chosen to be V(i) when the number of mismatches is i.
(7) The column voltages for each column in the matrix is determined independently by repeating the steps (4)-(6).
(8) Both the row voltage and column voltage are applied simultaneously to the matrix display for a time duration xcex94t, where xcex94t is minimum pulse width.
(9) A new row-select pattern is chosen and the column voltages are determined using steps (4)-(6). The new row and column voltages are applied to the display for an equal duration of time at the end of xcex94t.
(10) A frame or cycle is completed when all of the subgroups (=N/h) are selected with all the 2h row-select patterns once.
1 cycle=xcex94txc2x72hxc2x7N/h
C. Analysis
The row select patterns in a case in which there are i number of mismatches will now be considered. The number of h-bit row-select patterns which differ from and h-bit display data pattern by i bits is given by
hCi=h!/{i!(hxe2x88x92i)!}=Ci
For example, when the case for h=3 and row electrode selection pattern=(0,0,0) is considered, the results would be as shown in the table below:
These are determined by the number of bits of a word, not the row electrode selection patterns.
If the amplitude Vpixel of the instantaneous voltage that is applied to the pixel had a row voltage of Vrow and column voltage of Vcolumn, the synthesized voltage would be as follows:
Vpixel=(Vcolumnxe2x88x92Vrow) or (Vrowxe2x88x92Vcolumn)
Where, if Vrow=xc2x1Vr and Vcolumn=V(i), then Vpixel=xc2x1Vrxe2x88x92V(i) or xe2x88x92Vrxe2x88x92V(i).
If Vrow=xc2x1Vr and Vcolumn=xc2x1V(i), then Vpixel=Vrxe2x88x92V(i), Vr+V(i), xe2x88x92Vrxe2x88x92V(i) or xe2x88x92Vr+V(i).
That is:
Vpixel=|Vrxe2x88x92V(i)|or |Vr+V(i)|
As a consequence, the specific amplitude to be applied to the pixel is either (Vr+V(i)) or (Vrxe2x88x92V(i)) in the selection row and is V(i) in the non-selection row.
In general, in order to achieve a high selection ratio, it is desirable that the voltage across a pixel should be as high as possible for an ON pixel and as low as possible for an OFF pixel.
As a result, when a pixel is in the ON state, the voltage |Vr+V(i)| is favorable for the ON pixel, and the voltage |Vrxe2x88x92V(i)| is unfavorable for the ON pixel. On the other hand, when a pixel is in the OFF state, the voltage |Vrxe2x88x92V(i)| is favorable for the OFF pixel, and the voltage |Vr+V(i)| is unfavorable for the OFF pixel.
Here, it is favorable for the ON pixel to increase the effective voltage and unfavorable for the ON pixel to decrease the effective voltage. The number of combinations that selects i units from among the h bits is:
Ci=hCi={h!}/{i!(hxe2x88x92i)!}
The total number of mismatches provides the number of unfavorable voltages in the selected rows in a column. The total number of mismatches is ixc2x7Ci in Ci row select patterns considered are equally distributed over the h pixels in the selected rows. Hence the number of unfavorable voltages per pixel (Bi) when number of mismatches is i can be obtained as given following;
Bi=ixc2x7Ci/h (units/pixel)
The number of times a pixel gets a favorable voltage during the Ci time intervals considered is:
Ai={(hxe2x88x92i)/h}Ci
In addition:
{(hxe2x88x92i)/h}xc2x7Ci+(i/h)xc2x7Ci=(h/h)Ci=Ci
Accordingly, the following is obtained:
Ai=Cixe2x88x92Bi={(hxe2x88x921)!) }/{i!xc2x7(hxe2x88x92ixe2x88x921)!}
Where:
hxe2x89xa6i+1
To summarize the above:
Von (rms)={(S1+S2+S3)/S4}1/2
xe2x80x83Voff(rms)={(S5+S6+S3)/S4}1/2
  "AutoLeftMatch"                                          S            1                    =                                    ∑                              i                =                0                            h                        ⁢                          xe2x80x83                        ⁢                          Ai              ⁢                              xe2x80x83                            ⁢                                                (                                                            V                      r                                        +                                          V                      ⁢                                              xe2x80x83                                            ⁢                                              (                        i                        )                                                                              )                                2                            ⁢                              xe2x80x83                            ⁢                              (                favorable                )                                                                                              S            2                    =                                    ∑                              i                =                0                            h                        ⁢                          xe2x80x83                        ⁢                          Bi              ⁢                              xe2x80x83                            ⁢                                                (                                                            V                      r                                        +                                          V                      ⁢                                              xe2x80x83                                            ⁢                                              (                        i                        )                                                                              )                                2                            ⁢                              xe2x80x83                            ⁢                              (                unfavorable                )                                                                                              S            3                    =                                    {                                                (                                      N                    ⁢                                          /                                        ⁢                    h                                    )                                -                1                            }                        ⁢                          xe2x80x83                        ⁢                                          ∑                                  i                  =                  0                                h                            ⁢                              xe2x80x83                            ⁢                                                (                                      Ai                    +                    Bi                                    )                                ⁢                                  xe2x80x83                                ⁢                V                ⁢                                  xe2x80x83                                ⁢                                                      (                    i                    )                                    2                                                                                                              S            4                    =                                    2              h                        ·                          (                              N                ⁢                                  /                                ⁢                h                            )                                                                                S            5                    =                                    ∑                              i                =                0                            h                        ⁢                          xe2x80x83                        ⁢                          Ai              ⁢                              xe2x80x83                            ⁢                                                (                                      Vr                    +                                          V                      ⁢                                              xe2x80x83                                            ⁢                                              (                        i                        )                                                                              )                                2                            ⁢                              xe2x80x83                            ⁢                              (                favorable                )                                                                                              S            6                    =                                    ∑                              i                =                0                            h                        ⁢                          xe2x80x83                        ⁢                          Bi              ⁢                              xe2x80x83                            ⁢                                                (                                      Vr                    +                                          V                      ⁢                                              xe2x80x83                                            ⁢                                              (                        i                        )                                                                              )                                2                            ⁢                              xe2x80x83                            ⁢                              (                unfavorable                )                                                        
In addition:
Vr/Vo=N1/2h row selection voltage
V(i)/VO=(hxe2x88x922i)/h={1xe2x88x92(2i/h)}column voltage, and
R=(Von/Voff)max={(N1/2+1)/(N1/2xe2x88x921)}1/2
When plural sequentially row electrodes are simultaneously selected and driven as in prior art example described above, however, the pulse width applied to the row electrodes and column electrode also narrows as the number of simultaneously selected row electrodes increases, and picture quality deteriorates as crosstalk increases due to waveform rounding. This problem is particularly noticeable when this drive method is applied to gray scale displays using pulse width modulation.
Moreover, a liquid crystal display driven according to such a method has poor contrast between its ON and OFF states.
It is an object of the present invention to provide an apparatus that obviates the aforementioned problems of the conventional liquid crystal devices.
It is a further object of the present invention to provide a liquid crystal display for displaying a gray scale image having high image quality, simply and reliably.
It is still another object of the present invention to provide a gray scale display with a reduced number of column voltage levels.
It is an additional object of the present invention to provide a drive method, drive circuit, and display apparatus for a liquid crystal panel capable of achieving a good gray scale display even when simultaneously selecting and driving plural sequentially row electrodes.
It is still yet another object of the present invention to provide a driving method for a liquid crystal panel having reduced crosstalk.
These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings.
Although the detailed description and annexed drawings describe a number of preferred embodiments of the present invention, it should be appreciated by those skilled in the art that many variations and modifications of the present invention fall within the spirit and scope of the present invention as defined by the appended claims.
According to an aspect of the present invention, a multiplex drive method for a liquid crystal panel is provided in which the selection period is divided into plural periods, and a weighted voltage is applied in accordance with the desired display data in the divided selection periods to achieve a gray scale display.
According to another aspect of the present invention, a drive method for a liquid crystal panel is provided in which selected pulse data generated by the scan data generating circuit and display data pattern for plural simultaneously selected scan lines by means of an operating circuit is calculated. The data based on the calculation result is transferred to a column electrode driver and the scan data is simultaneously transferred to the row electrode driver to achieve a desired gray scale display.
According to a further aspect of the present invention, a liquid crystal display apparatus comprises a drive circuit for calculating selected pulse data generated by the row-select pattern generating circuit and the display data for plural simultaneously selected scan lines by means of an operating circuit. A means is provided for transferring the data based on the calculation result to the column electrode driver and for simultaneously transferring the scan data to the row electrode driver. This means also divides the selection period into plural parts and applies a weighted column voltage in accordance with the desired display data by the drive circuit to the column electrodes in each of the divided selection periods to achieve a gray scale display.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings.